Since the development of integrated circuit technology, semiconductor chips have been fabricated primarily on a mono-crystalline silicon wafer with active devices such as transistors and diodes fabricated near the top surface of the wafer. These chips often become hot during operation due to heat dissipation, especially in the case of high-density logic and microprocessor chips. Traditionally, one method for cooling the integrated circuit chips has been the attachment of external heat sinks to the backside of the chip, or to the module into which the chip is packaged. This technology is often referred to as bulk silicon technology.
A more recent technology called silicon-on-insulator, or SOI, utilizes a layer of mono-crystalline silicon stacked on top of an insulator, typically silicon oxide, which itself is stacked on top of a thick substrate, most often a silicon wafer. Several methods of fabricating such SOI wafers involve bonding together two wafers, for example, a method in which each wafer has an oxidized surface, and the wafers are bonded together, oxidized surface to oxidized surface, to form the middle insulating silicon oxide. The bonding is followed by thinning the backside of one of the wafers so as to form a thin mono-crystalline silicon uppermost layer, with the other wafer becoming the lowermost layer of the stacked SOI wafer. The active devices are fabricated in the uppermost, thin monocrystalline silicon layer of the wafer stack.
Another feature of SOI technology is the ability to form isolated pockets of mono-crystalline silicon in the upper thin mono-crystalline silicon layer by etching down to the middle insulating layer, and then back filling with an insulator such as silicon oxide, or by other methods. In the above manner various active area portions of the wafer are effectively isolated from one another without the potential for any latch-up conditions.
In this newer SOI technology, cooling of the chip still utilizes the methods applied to conventional chips fabricated with bulk silicon technology. One problem with the existing cooling techniques, however, is that the heat generated from any individual device or group of devices typically must travel from the device junctions through the bulk silicon to the backside of the chip where the heat sink operates to conduct the heat away therefrom. The effectiveness of cooling a single device or group of devices is affected by the cooling of the chip as a whole. For SOI, added to this problem is the fact that SOI devices are generally designed to run faster and can therefore generate more heat than devices on conventional bulk substrate material. If the heat could be conducted away directly at or very near to the device junctions, individual devices or groups running very hot could be cooled more effectively.
Therefore there is a need in the art for a method of making SOI starting material that is conducive to removing the heat of semiconductor devices fabricated thereon.